The following patent is hereby incorporated by reference herein: U.S. Pat. No. 7,271,750 (“the '750 patent”), issued Sep. 18, 2007.
Pipelined analog-to-digital converters (“ADCs”) that are used for converting analog signals into their digital representations often require specific signal-to-noise ratios and/or high sampling rates. These converters contain a multiplying DAC (“MDAC”) and a flash ADC, and may require large sampling capacitors and a high-speed and high-gain amplifier (or operational transconductance amplifier (OTA)). The residue amplifier, typically, consists of two stages. Often the first stage is a cascode differential amplifier and the second stage is a simple differential pair. The residue amplifier has to have a high gain and a high bandwidth for proper operation. A high gain and a high bandwidth requirement typically results in a high power consumption which is not desirable. Reducing the power consumption of the converter may be undertaken by relaxing the gain and/or the bandwidth requirements of the residue amplifier. However, relaxing gain and bandwidth requirements creates inter-stage (gain) errors within the residue amplifier that are temperature and sample-rate (clock-frequency) dependent.
The summing-node sampling (“SNS”) calibration algorithm, discussed in the '750 patent, is an algorithm that allows for simultaneously lowering the power consumption of the ADC and correcting for the inter-stage gain errors of the residue amplifier. The SNS algorithm samples the voltage at the summing-node of the MDAC (“summing-node voltage”) and processes the samples at a sample rate that is lower than the sample rate of the converter, which results in a low power calibration method. The sampled summing-node voltage is amplified by a predetermined gain and then digitized using a separate analog-to-digital converter. The open-loop gain of the residue amplifier can be estimated from the output of the residue amplifier (“residue voltage”) and the summing-node voltage, and therefore the SNS algorithm assists in determining the residue amplifier's open-loop gain. The accuracy of the open-loop gain estimate does not have to be very high as depicted by equation (i). For example, a residue amplifier with an open-loop gain of 90 dB may only require a 5-bit accurate estimate of its open-loop gain to achieve a 16-bit accuracy in the MDAC's gain (i.e. closed loop gain).
                                                        ∂                              V                o                                                    V              o                                =                                    K                              A                act                                      ⁢                                                                          ∂                                      A                    est                                                                    A                  est                                                                                  ,                            (        i        )            where Vo is the residue voltage, Aest is the estimated open-loop gain of the residue amplifier, Aact is the actual open-loop gain, and K is the inverse of the feedback factor.
The digitized summing-node voltage and a separately digitized residue voltage are high pass filtered and processed using a least-mean-square (“LMS”) algorithm to filter noise and estimate the open-loop gain of the residue amplifier. The LMS algorithm is used by the SNS calibration algorithm and can correct the inter-stage gain error of the MDAC through a digital correction or through an analog correction.
While the SNS algorithm does not have a large power consumption and can also correct for nonlinearity, it has a number of drawbacks. A measurement of the summing-node voltage may be affected by the input signal due to coupling, as sampling occurs at every sub-range of the MDAC and all of the samples are used by the algorithm. Therefore, the estimate of the open-loop gain of the residue amplifier may be dependent on the input signal. Any fluctuation at the input will lead to a variation in the gain estimate of the residue amplifier, limiting the effectiveness of the SNS algorithm.
Thus there remains a need in the art, for an algorithm which may allow for low power consumption and correct inter-stage (gain) error of an MDAC, without outputting a varying estimate of the open-loop gain of the residue amplifier that is dependent on the input signal.